Barcelona Architecture: AMD on the Counterattack
by Anand Lal Shimpi on March 1, 2007 12:05 AM EST- Posted in
- CPUs
Final Words
When Intel launched its first Core 2 based microprocessors, the performance improvement was beyond revolutionary. It was the biggest single performance improvement we had seen from a new microprocessor in several years at that point. A large part of Core 2's success was its architecture, but you cannot ignore that it couldn't have come at a better time for Intel.
All Conroe, Merom and Woodcrest had to do was outperform Intel's aging and misguided NetBurst based Pentium 4 processors. Doing so proved quite easy for AMD, which had been doing just that pretty much since the 2000 launch of the processors. With no competition from within Intel, AMD wasn't really doing that much better. While the K8 was a strong architecture, it was getting old. Without any serious performance enhancing architectural updates since its introduction back in 2003, AMD left Intel with a stationary target to aim for. With each successive iteration of the Pentium M architecture, Intel came closer and closer to developing its own Athlon 64 killer, eventually culminating in the release of such a product - the Core 2 Duo.
It wasn't some mystical force of microprocessor design prowess that allowed Intel to pull ahead last year; it was a good architecture and excellent timing. Ironically enough, it was the same two elements that orchestrated much of the success of AMD's K7 and K8 architectures; they were both good designs released at times when the competition was at its worst.
In terms of actual product releases, the first incarnation of AMD's new architecture will be found in the next-generation Opteron due out at the middle of this year. AMD will initially launch at speeds ranging from 2.1GHz to 2.3GHz, but by the end of this year you can expect higher clock speeds. On the desktop, AMD's Agena core will be a Barcelona equivalent shipping at between 2.7 - 2.9GHz. Kuma will be a dual-core variant of Agena shipping in the 2.0 - 2.9GHz range.
Barcelona will be a success for AMD; the long awaited architectural update to K8 should yield significant performance improvements, especially in current areas of weakness for the K8 (e.g. video encoding). Our review of the Athlon 64 X2 6000+ showed that with aggressive pricing, AMD could come close to offering something competitive to Intel. At current prices, we suspect that Barcelona would be enough to close the gap between AMD and Intel. Chances are that we won't see bargain basement prices on AMD's new cores, but we'd expect that AMD would have to maintain a competitive market.
The real catch here is what happens after Barcelona; as we mentioned before, Intel's current successes were born out of steady but regular evolution of a good starting architecture. With yearly updates to the Pentium M, Intel achieved a snowball effect that proved difficult to stop. It would seem that a similar approach by AMD would be necessary to avoid sticky situations like the one it finds itself in today.
When Intel launched its first Core 2 based microprocessors, the performance improvement was beyond revolutionary. It was the biggest single performance improvement we had seen from a new microprocessor in several years at that point. A large part of Core 2's success was its architecture, but you cannot ignore that it couldn't have come at a better time for Intel.
All Conroe, Merom and Woodcrest had to do was outperform Intel's aging and misguided NetBurst based Pentium 4 processors. Doing so proved quite easy for AMD, which had been doing just that pretty much since the 2000 launch of the processors. With no competition from within Intel, AMD wasn't really doing that much better. While the K8 was a strong architecture, it was getting old. Without any serious performance enhancing architectural updates since its introduction back in 2003, AMD left Intel with a stationary target to aim for. With each successive iteration of the Pentium M architecture, Intel came closer and closer to developing its own Athlon 64 killer, eventually culminating in the release of such a product - the Core 2 Duo.
It wasn't some mystical force of microprocessor design prowess that allowed Intel to pull ahead last year; it was a good architecture and excellent timing. Ironically enough, it was the same two elements that orchestrated much of the success of AMD's K7 and K8 architectures; they were both good designs released at times when the competition was at its worst.
In terms of actual product releases, the first incarnation of AMD's new architecture will be found in the next-generation Opteron due out at the middle of this year. AMD will initially launch at speeds ranging from 2.1GHz to 2.3GHz, but by the end of this year you can expect higher clock speeds. On the desktop, AMD's Agena core will be a Barcelona equivalent shipping at between 2.7 - 2.9GHz. Kuma will be a dual-core variant of Agena shipping in the 2.0 - 2.9GHz range.
Barcelona will be a success for AMD; the long awaited architectural update to K8 should yield significant performance improvements, especially in current areas of weakness for the K8 (e.g. video encoding). Our review of the Athlon 64 X2 6000+ showed that with aggressive pricing, AMD could come close to offering something competitive to Intel. At current prices, we suspect that Barcelona would be enough to close the gap between AMD and Intel. Chances are that we won't see bargain basement prices on AMD's new cores, but we'd expect that AMD would have to maintain a competitive market.
The real catch here is what happens after Barcelona; as we mentioned before, Intel's current successes were born out of steady but regular evolution of a good starting architecture. With yearly updates to the Pentium M, Intel achieved a snowball effect that proved difficult to stop. It would seem that a similar approach by AMD would be necessary to avoid sticky situations like the one it finds itself in today.
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BitByBit - Tuesday, March 6, 2007 - link
One apparently overlooked detail of Barcelona's architecture is its instruction fetch ability: Barcelona is able to send 32 bytes (128 bits) to its decoders per cycle, where Core can send only 16 bytes to be decoded, increasing the likelihood of 'split fetch' cases in the latter. This means that, even if Core does have more raw FP power in terms of its execution units, Barcelona can expect greater utilisation of its FPUs/SSE, and the impact of this will be even more pronounced when running 64 bit code, due to the increased size of 64 bit instruction blocks. If Barcelona does, as expected, outperform Core in IPC in 32 bit mode, the performance gap may well increase in 64 bit mode.JarredWalton - Thursday, March 1, 2007 - link
Did you miss page 3? The SSE128 stuff largely deals with FP and cache improvements. Standard FP is still used, but most programs are optimizing for SSE2/3 as that can run circles around x87 FP performance.Spoelie - Thursday, March 1, 2007 - link
Is there no information on the bandwidth between the new caches? Or are they left the same? I'm only asking because last I read, Intel had a huge advantage in that department, with double or so the bandwidth between the caches. Isn't that important in FP-code, especially if you have to feed 4 cores (so the bw at the level 3 cache..)JarredWalton - Thursday, March 1, 2007 - link
Page 3: the cache bandwidth as I understand it should be doubled (128-bit vs. 64-bit), and several other areas have wider data paths as well. I think Intel has a 256-bit cache bus, so they still have more cache bandwidth, but as a whole it's difficult to say which will end up faster right now. The integrated memory controller has a lot of influence on a lot of areas, after all.Spoelie - Thursday, March 1, 2007 - link
K7 to K8 transition did the doubling of the 64bit interface to the 128bit one.. Core indeed has a 256bit interface (as far as I remember, even the P3 had a 256bit interface to L2). So according to page 3 the interface would be doubled again this time around?I'm only asking because I remember this quote from Johan De Gelas' article a while back.
"The Core architecture's L1 cache delivers about twice as much bandwidth (Measured by ScienceMark), while it's L2-cache is about 2.5 times faster than the Athlon 64/Opteron one."
And that must have *some* impact on performance. I think the bandwidth of the L3 cache will also be key, but haven't seen any official information about it.
BitByBit - Friday, March 2, 2007 - link
K8 had a 64-bit read and a 64-bit write path to its L2 cache, giving a total of 128 bits. Barcelona has a 128-bit read and 128-bit write path to its L2, giving a total of 256 bits - the same as Core.One thing that surprised me on the subject of cache was the associativity of the L1, which I had expected to see increased to 4-way. This would have allowed AMD to extend its lead in L1 hitrate and regain the ground lost in this area since the introduction of Core. Maybe we'll see an improvement to L1 associativity in future iterations of Barcelona.
haplo602 - Thursday, March 1, 2007 - link
Great article, was a very interesting read.Looks like I'll invest in an upgrade sometime beginning of 2008 when these new CPUs make their 2nd revision :-)
Gigahertz19 - Thursday, March 1, 2007 - link
Argh this article is such a cock tease. I read most of it but now I want some prelim benchies or some kind of numbers. Guess we'll have to wait till Mid-2007?I can't stand the anticipation, my girlfriend pulls this same shit every now and then, she'll get me going then quit and laugh....I always tell her I'll pull the same thing on her and see how she likes it but I can never gather up enough will power :)
MrJim - Thursday, March 1, 2007 - link
Hello Anand, great article as always. I suppose your much at home nowadays building your house etc. But when are we going to read more of your blogs or the relaunch of anandtech? I think the plan was to have many of the staff to have their own blogs?Hope you will write more often in the future!
slashbinslashbash - Thursday, March 1, 2007 - link
I agree, I would like to see more Anand blog entries. The blog currently doesn't seem to be working -- I can't pull up any of the older entries. I would like to go back and read through some of the old Macdates.