Intel: More Details on Penryn and Nehalem

In our meeting today, Stephen L Smith (Intel's Vice President Director of the Digital Enterprise Group) and Pat Gelsinger revealed some very interesting details about their next-generation Penryn family of processors. These processors will be launched in the second half of this year. Details of Nehalem, which will see the light in the second half of 2008, were also provided.

Both new processors are based upon the current Intel Core micro architecture and use Intel's newest 45nm Hi-k process technology with its hafnium-based Hi-k + metal gate transistor design. We discussed Intel's 45nm process technology in more detail previously. According to Intel, more than fifteen 45nm Hi-k product designs are in various stages of development, and Intel will have two 45nm manufacturing fabs in production by the end of the year, with a total of four in production by the second half of 2008.



Penryn's Enhanced Core Architecture

The quad core version of Penryn contains 820 million transistors (Kentsfield has 582 million) in two very small dies of 107mm². That makes the new design 25 percent smaller than Intel's current 65nm Quad core (143 mm²).


The new Penryn CPU also has yet another addition to the x86 ISA: Intel Streaming SIMD Extensions 4 (SSE4) instructions. It has also been confirmed that Penryn will deliver higher IPC and higher clock speeds. Intel wouldn't say more than "more than 3 GHz", but considering that the FSB is bumped up to 1600 MHz, 3.2 GHz is likely. However, several Intel people confirmed that if necessary ("depending on what the competition does"), the 45nm CPUs can go quite a bit higher (3.6 GHz is probably a safe estimate, considering how far current Core 2 CPUs are able to overclock).


With regards to power, Intel will be introducing what it is calling "Deep Power Down Technology", or a new lower power state, C6. The new C6 state reduces core voltage down to the absolute minimum for the given process technology, shuts down the core clock as well as turns off all of the caches. It is the absolute lowest power state that can be attained and will be introduced on Mobile Penryn family processors.

Penryn family processors are supposed to be socket-compatible, meaning that on the desktop we will see them introduced as LGA-775 CPUs. We'd expect that Intel's new lineup of chipsets will be required, but we are not sure if the new chipsets will support the 1600MHz FSB out of the box or if a refresh will be required.


Penryn-based processors also have a much better divider unit, roughly doubling the divider speed using a faster divide technique called Radix 16. Also, the shuffle engine has been improved. Intel's "Super Shuffle Engine" is a 128-bit, single-pass shuffle unit that can perform full-width shuffles in a single cycle, improving performance for SSE2, SSE3 and SSE4 instructions that have shuffle-like operations such as pack, unpack and wider packed shifts.


The last improvement is the "Split Load Cache Enhancement" which lowers the impact of data which is not aligned to cacheline boundaries. This seems to happen in some SSE intensive imaging applications.

The Quad core desktop and the quad core Xeon products will need 120W, 80W and 50W (LV) just like today. The dual core products will get a 40W/65W and 80W TDP.