AMD's SB750: Enabling Higher Phenom Overclocks?
by Gary Key on July 23, 2008 12:00 AM EST- Posted in
- CPUs
The new SB750, or more like a SB700 with BOTOX-
The SB750: I remember when South Bridges weren't built on flip-chip packages
While technically a new part, the SB750 appears to us to be a point upgrade to the SB700. However, it is a major improvement over the SB600 used on the current 790FX boards. Anyway, let’s get into what has changed and what has not.
The SB700/750 features six SATA 3.0Gb/s ports, up from four on the SB600, with the ability to reserve up to two of those ports for eSATA connectivity. Drives can be set up in RAID 0, 1, or 10 and RAID 5 now makes its appearance in the SB750. We just received a beta set of drivers for this new feature, but at first glance, it appears to work fine at this point.
Still missing in action is a native interface for networking support. AMD continues to use an external PHY and MAC for network operations. Although performance is similar to the NVIDIA and Intel solutions, this setup does incur a cost penalty for the motherboard suppliers.
The major improvement in the SB700/750 series over the SB600 is the increase in USB 2.0 performance and the number of ports available. The new dual-channel controller features 12 USB 2.0 capable ports and 2 specific 1.1 ports for compatibility reasons. USB 2.0 performance is now on par with the Intel and NVIDIA solutions.
A single PATA channel provides native IDE support for up to two drives. This channel supports PIO, multi-word DMA, and Ultra DMA 33/66/100/133. Six PCI lanes are still included although we doubt a board manufacturer is going to offer that many. AMD dropped HyperFlash support on the SB700 to make way for the new Advanced Clock Calibration interface.
The SB700/SB750 features four PCI Express lanes for the A-Link Express II interconnect, but like the current 790FX/780G series or upcoming product that we dare not mention, those four lanes are based on PCI Express 1.1 specifications. That means the interconnect bandwidth is capped at 2GB/s, half of what it would be in a PCI Express 2.0 configuration.
Finally, we have the High Definition Audio controller carried over from the SB700 that allows up to 16 channels of audio output per stream. The controller supports up to four codecs with sample rates reaching 192kHz at up to 32-bits per sample.
How it Works, um, Kinda
AMD was extremely vague in explaining to us exactly how the new SB750 South Bridge actually improved Phenom overclocking. At first all we were given was these two diagrams:
Clearly.
It makes it faster.
You see, the SB750...yeah, these pictures really meant nothing to us so we dug a little deeper with AMD.
Here's what we do know:
The SB750 now has a direct 6-pin interface to the AM2+ socket on the motherboard, there are now pins on the Phenom CPU that connect directly to the SB750. These pins were previously unused and are now used as a means of communication between the South Bridge and the CPU. The SB750, in combination with an updated BIOS, can now override some of the CPU's internal settings which can potentially increase the overclocking headroom of the chip.
AMD says that the settings tweak doesn't impact performance and doesn't change thermals or voltages, it simply can allow a Phenom processor to clock higher when overclocking. The BIOS exposes the parameter being changed, which AMD refers to as the Advanced Clock Calibration (ACC) value. Typically this value has a range of -2 to 0, on motherboards with the SB750 that support ACC the value can be set from -12 to +12. Higher numbers should allow for higher clock speeds, while lower values should allow for lower voltages/lower power operation.
Even after further pressuring, AMD wouldn't tell us what this value actually adjusts - simply stating that it makes it easier for the CPU to run at higher speeds. Based on AMD's careful choice of words, it would seem that adjusting the ACC somehow changes the acceptable margins of operation for the CPU cores (the value can be changed on a per-core basis in AOD or BIOS). By loosening these margins, however it is able to do so, the SB750 + ACC combo can enable many Phenom processors to operate outside of their normal overclocking margins. In fact, AMD is confident enough about the technology that they are willing to state that on average; a 100MHz to 300MHz increase in clock speeds is attainable by the user after some tweaking.
The SB750/ACC trick doesn't work on anything other than Phenom processors, and it works particularly well on the Black Edition processors. While AMD didn't rule out eventually enabling this on K8 based cores, it is a Phenom-only option for now. Reaching higher clock speeds is more of a top priority for Phenom, and it's unclear whether or not whatever AMD is doing here can even work on K8 if they tried. AMD also committed to enabling similar tweaks for upcoming 45nm based Phenom parts, implying that this was not a short-term solution to the clock speed problem.
At the same time, AMD implied that the tweaks that the SB750/ACC feature enables could be incorporated into the manufacturing chain and actually implemented in hardware. There's something strange going on here, but as you'll soon see - the tweak actually works.
Microprocessors are designed to operate in even the most extreme of conditions, AMD seemed to imply that its ability to adjust the ACC value somehow changes this. Curiously enough, AMD cited "competitive concerns" as a reason why it would not disclose exactly what's going on with this new overclocking feature. We can't help but wonder if it is because AMD is going a little too far in the sacrifices it's willing to make in the quest for higher clock speeds.
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Maroon - Thursday, July 24, 2008 - link
"We can't help but wonder if it is because AMD is going a little too far in the sacrifices it's willing to make in the quest for higher clock speeds." Hello? This is the one thing that keeps the latest generation AMD procs from being competitive with Intel's. Are we sacrificing stability that you're not telling us?And then the bitching about the integrated LAN...please? Sounds like you guys are just pissed that AMD won't tell you the new SB works.
ughtas - Thursday, July 24, 2008 - link
I remember from months ago, that the L2/L3 cache performance was changed to support larger cache sizes. Is it possible that the tweaks that ACC makes to the processor timing improve the cycle time or allow better lookahead?nubie - Thursday, July 24, 2008 - link
I for one am glad to see an AMD processor at 3.4ghz, if this is a new trend I am all for it.I want to know what kind of clock-for-clock performance this has compared to an Intel, just for kicks.
I had a chat with a knowledgable IT guy, he claims that Intel systems boot faster to a usable desktop than AMD, and he has side by side bench tested them.
I didn't think to ask if he had done tests with comparable level 2 cache, an area that I think may be causing problems, AMD has no processors with 1M level 2 cache except a few older 90nm cores. They are just giving up in this area to Intel.
I applaud them for making neat server processors, but 512k level 2 cache is not cutting it these days.
I have been running on a Core2 "solo" Celeron 430 @2.4ghz for the last several months, and I must say while it is pretty damn fast there are times when it seems to "lock" or "micro-freeze" when it is doing a lot of multitasking.
Xray1 - Thursday, July 24, 2008 - link
Na, the L2 cache is pretty unimportant for AMD processors, as the on chip memory controller is very fast. For example, the difference between 1M L2 and 512k L2 K8 processors at otherwise same speed is for most apps somewhere in the range of 0-5%.Your single core Celeron locks in multitasking, because its single core.....single core is completely obsolete these days.
As to the boot speed: This heavily depends on the system config, bios etc. Plus: How often do you boot? I do that once a day and don't really care if it takes 30 sek more or less.
Xray1 - Thursday, July 24, 2008 - link
One reason for the proprietary 6pin connection between SB and CPU could be: It's simply a hardware dongle to ensure the best possible oc results can only be found on AMD chipset mainboards......It is very hard to believe AMD could not have made the same thing possible by MSR programming in the CPU.If AMD does not get more specific on this, we need true hardware nerds to sniff on these 6 lines and try to reverse engineer what's happening on them.
pmonti80 - Thursday, July 24, 2008 - link
Not so fast my friend.Just look here:
http://www.overclockers.com/tips01369">http://www.overclockers.com/tips01369
Now we have a more plausible explanation that does not involve strange "black magic".
ACC is just another form of CPU skew.
No big deal for anyone, end of the story.
ZootyGray - Friday, July 25, 2008 - link
Your linked source is not saying what you are saying. It's a guess. and conclusions are stated as being based on the assumption that the guesses and assumtions are true.Your attitude overrides that - NOT END OF STORY. And the results reported here stand untouched by your opinion based on what someone else said is assumption and guess. (right or wrong).
Additionally the author of your referenced article is very gracious in excusing himself if his guesses and assumptions are incorrect. And yet he ungraciously comes down pretty heavy in ending his article. And that is what has triggered your own feigned knowledgeable statement.
Maybe it is true - and maybe not. But oclokrs must live in perpetual embarrassment if it is true - and you embarrass yourself in the face of hard testing and accurate reporting of results of that testing. If I wanted speculative guessing and assumption and self agrandisement based on possibly erroneous opinion, I would go read bullshit at toms bubblegum guide. You might enjoy that more since you are apparently so inclined.
You put 60 hours work behind your statement and you might understand a cheap slap.
pmonti80 - Friday, July 25, 2008 - link
You are right on my attitude about last post. Sorry about that.But still I think the analysis of what could be happening here (based on both articles) is probably more in the line of CPU skew or some similar thing. It seems way easier to do with just 6 pins (4 or 5 really usable for ACC).
ZootyGray - Friday, July 25, 2008 - link
I agree with you. And it seems plausible (at least) that skew is quite probably it. The report however is about facts and not /guess /assumption /opinion - and therein is it's value.I fully expect that some will hack into this secret - much like was done before with AMD cpu's when they used the graphite pencil trix - it was all great.
Perhaps I owe an apology to you. I am a little overzealous since I have been seeking a factual, scientific review/testing site for some time. I like what's happening here. I hope I did not come down too heavily on you and the useful info that you presented. (altho the 'embarrass' part in that info,is merely abuse and useless shaming - essentially the stuff of flamewar, ego and fear (which reflects on the author).
Your point is taken and thank you for your (this) reply.
Xray1 - Friday, July 25, 2008 - link
The possibility that it is all about cpu skew/timings does not contradict what I have said. Why do you need a 6 pin connection from a southbridge to the CPU to change these settings? You can do that with simple register programming (MSRs). That's just like what has been done in the past (especially in timing settings of the AthlonXP FSB).So for me the big secret 6pin connection still looks like a big hardware dongle to allow for AMDs overclocking tool to only work on AMD chipset mainboards. They wanted to make it 100% non-software accessible, so there would be no way of doing it on non-AMD chipset boards. That's all I said. And yes, it's also speculation. But as long as they keep it cloed source, it's a non-accessible feature for other chipset makers.